1. Field of the Invention
The present invention relates to the deposition of a layer on a substrate. More specifically, the invention relates to deposition of a doped layer on a substrate.
2. Background of the Related Art
Consistent and fairly predictable improvement in integrated circuit design and fabrication has been observed in the last decade. One key to successful improvements is multilevel interconnect technology, which provides the conductive paths between the devices of an integrated circuit (IC) and other electronic devices. The shrinking dimensions of features, presently in the sub-quarter micron and smaller range, such as horizontal interconnects (typically referred to as lines) and vertical interconnects (typically referred to as contacts or vias; contacts extend to a device on the underlying substrate, while vias extend to an underlying metal layer, such as M1, M2, etc.) in very large scale integration (VLSI) and ultra large scale integration (ULSI) technology, has increased the importance of reducing capacitive coupling between interconnect lines and reducing resistance in the conductive features.
Aluminum has traditionally been the choice of conductive materials used in metallization. However, smaller feature sizes have created a need for a conductive material with lower resistivity than aluminum. Copper is now being considered as an interconnect material to replace or complement aluminum because copper has a lower resistivity (1.7 xcexcxcexa9-cm compared to 3.1 xcexcxcexa9-cm for aluminum) and higher current carrying capacity.
Despite the desirability of using copper for semiconductor device fabrication, choices of methods for depositing copper into features having a high aspect ratio above about 4:1 in sub-quarter micron features are limited. In the past, chemical vapor deposition (CVD) and physical vapor deposition (PVD) were the preferred processes for depositing electrically conductive material, typically aluminum, to fill the contacts, vias, lines, or other features formed on the substrate. However, precursors for CVD processes for depositing copper are currently under development and PVD processes for filling copper features can bridge the openings of very small features and leave voids in the features.
As a result of CVD and PVD challenges, electroplating processes, previously used primarily for circuit board fabrication, are being developed for deposition of conductive material, particularly copper, to fill small features on a substrate. However, electroplating has its own challenges in depositing uniformly on a substrate. Electroplating uses an electrically conductive seed layer, such as a copper layer conformally deposited by CVD or PVD, to initiate the electroplating deposition process on the substrate. As stated, the CVD of copper is being developed and thus, PVD is the current choice for depositing the seed layer conformally over the feature.
However, PVD of copper tends to agglomerate across the deposition surface and in the lines and vias due to surface diffusion of the copper material. As the copper is deposited on a substrate, a high surface diffusivity of copper, which is a function of the deposition temperature, causes the deposited copper film to agglomerate such that the film will either dewet, thereby becoming discontinuous, and/or roughen such that the agglomeration reduces the overall surface energy of the exposed copper surface. This agglomeration has the adverse effect on a subsequent electroplating process such that either the discontinuous film will lead to micro-voids in the electroplated copper or the roughened surface will provide a localized electrical field, also resulting in micro-voids and other nonuniformities. If the electroplated layer, such as a seed layer, is nonuniformly deposited on the substrate, then the current will not be evenly distributed over the surface of the seed layer and may result in nonuniform deposition of a subsequent electroplated layer on the substrate.
Furthermore, copper is highly susceptible to oxidation, which increases the resistivity of a copper feature. Oxidation can occur when the substrate is moved between chambers and exposed to ambient conditions or in a particular process that exposes the copper to an oxygen source. Oxidation of copper increases the resistivity of the lines and vias formed.
Therefore, there is a need for an improved deposition process that reduces the voids in features produced from a conductive material deposition and reduces unwanted oxidation effects on the substrate.
The present invention generally provides a method and apparatus for forming a doped layer on a substrate to improve uniformity of subsequent deposition thereover. Preferably, the layer is deposited by a sputtering process, such as physical vapor deposition (PVD) or Ionized Metal Plasma (IMP) PVD, using a doped target of conductive material. Preferably, the conductive material, such as copper, is alloyed with a dopant, such as phosphorus, boron, indium, tin, beryllium, or combinations thereof, to improve deposition uniformity of the doped layer over the substrate surface and to reduce oxidation of the conductive material. It is believed that the addition of a dopant, such as phosphorus, stabilizes the conductive material surface, such as a copper surface, and lessens the surface diffusivity of the conductive material. The overall surface diffusivity of copper is reduced such that the tendency to agglomerate or to become discontinuous is reduced, thereby allowing the deposition of a smoother conductive film and thereby reducing localized agglomeration of the conductive material. The smoother film is highly desirable for subsequent deposition processes. A conductive material, such as copper, can be deposited on the deposited doped layer by a variety of processes including PVD, chemical vapor deposition (CVD), electroplating, electroless deposition and other deposition processes.
In one aspect, the present invention provides an apparatus for depositing a material on a substrate, comprising a processing chamber and a doped conductive target. The target comprises a conductive material selected from the group of copper, tungsten, aluminum or combinations thereof and a doping material selected from the group of phosphorus, boron, indium, tin, beryllium or combinations thereof.
In another aspect, the invention provides a doped conductive target for sputtering a layer on a substrate. The doped conductive target comprises a conductive material selected from the group of copper, tungsten, aluminum or combinations thereof and a doping material selected from the group of phosphorus, boron, indium, tin, beryllium or combinations thereof.
In another aspect, the invention provides a substrate having a doped seed layer deposited by a sputtering process on the substrate. The doped seed layer comprises a conductive material selected from the group of copper, tungsten, aluminum or combinations thereof and a doping material selected from the group of phosphorus, boron, indium, tin, beryllium or combinations thereof.
In another aspect, the invention provides a method of sputtering a layer on a substrate, comprising generating a plasma in a substrate processing chamber, sputtering material from a doped conductive target, the target comprising a conductive material selected from the group of copper, tungsten, aluminum or combinations thereof and a doping material selected from the group of phosphorus, boron, indium, tin, beryllium or combinations thereof, and depositing the sputtered doped material on the substrate. A conductive layer of copper can be deposited over the sputtered doped material, preferably, by an electroplating process.